SIMD in the 90s: Programming Intel's Pentium MMX

MMX (MultiMedia eXtensions) was introduced with the Pentium MMX processor in 1997 for improved multimedia experience, including graphics, digital signal processing, audio, and modem software. It was a set of 57 additional instructions built into the Pentium chip for enhanced performance. The CPU had to be switched into MMX mode, which turned the first 64 bits of the x86 eight 80-bit floating point registers into MMX registers. Eight MMX registers (64 bits long) The idea motivating the creation and the use of MMX was simple: instead of processing one integer at a time, the CPU processes several integers packed inside a single 64-bit register simultaneously. For multimedia software (image processing, audio mixing, video playback, and even games) this could provide significant speedups. For example, instead of adding eight bytes individually: 10 + 20 30 + 40 50 + 60 70 + 80 ... MMX lets us perform all eight additions with a single instruction. That's parallelism! And that's the main idea behind SIMD. What is SIMD? "Single Instruction, Multiple Data" is a type of parallel processing technique. It describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously. SIMD can be internal (part of the hardware design) and it can be directly accessible through an instruction set architecture (ISA). In the case of the MMX, Intel extended their x86 instruction set to include the new SIMD instructions. Was MMX the First SIMD? No, MMX was definitely not the first SIMD, although it was hugely important in making SIMD mainstream on x86 PCs. We must remember that many advances and innovations in computer technology predates the personal computer era. SIMD is no different, and it predates Intel's MMX by decades. The general idea of using one instruction operating on multiple data elements goes back much further than the Pentium. One famous early example is the ILLIAC IV supercomputer project from the 60s. The ILLIAC IV was the first massively parallel computer. The system was originally designed to have 256 64-bit floating-point units (FPUs) and four central processing units (CPUs) able to process 1 billion operations per second. ILLIAC IV photo by Sascha Pohlflepp CC-BY-2.0 In summary, the ILLIAC IV used a large number of processing elements operating under a single instruction stream, making it an important ancestor of modern SIMD/vector architectures. ILLIAC IV array overview There were also array-processing machines from companies such as CDC, Cray, and others throughout the 60s and 80s. SIMD vs Array Processors It's important to point out that Vector Processing and SIMD are not quite the same thing. The distinction is mostly about how the multiple data elements are presented to the processor and how the hardware executes them. SIMD operations are fundamentally tied to the width of the registers. The Cray-1 from 1976 was characterized by being a vector processor. It had eight 64-element vector registers, each holding 64-bit values. Cray-1 supercomputer Similar to what we saw with SIMD, the Cray-1 did not require 64 separate ADD instructions. So, given that this is obviously SIMD-like, why don't we simply call it SIMD? Because of an architectural distinction. SIMD operates on fixed-width registers, while the vector register in the Cray-1 was more like a container for a sequence.

Its real significance was putting a relatively accessible SIMD instruction set into mainstream x86 PCs. That was the first time most of us (personal computer enthusiasts) were able to get our hands dirty with this type of technology, and that is why MMX gets so much attention in retro-computing discussions. It wasn't the invention of SIMD, but it was one of the moments when SIMD crossed over from specialized/high-performance computing into ordinary desktop software development. MMX Registers As we saw before, one clever design decision was that Intel didn't add a brand-new register file. Instead, MMX re-used the floating-point stack registers. MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 Each MMX register is 64 bits wide. Internally, the MMX registers were aliases of the x87 floating-point registers. These underlying floating-point registers were 80 bits long, but MMX accessed only the lower 64 bits. Eight MMX registers (64 bits long) This decision saved silicon, but it also created an important limitation: SIMD and floating-point operations were mutually exclusive. Since MMX is basically "taking over" the x87 floating-point registers, MMX multimedia operations and floating-point operations could not coexist. It also created an important rule: Don't mix MMX and x87 floating-point code without cleaning up first. Don't worry... we'll come back and talk more about these limitations very soon. Packed Integer Data A single MMX register could hold different layouts: The same register could represent any of these layouts depending on the instruction you used. Your First MMX Program Suppose we want to add 8 pixels together (assuming no compiler optimization): for (int i = 0; i < 8; i++) { dest[i] = src1[i] + src2[i]; } An MMX version would look like: movq mm0, [src1] ; loads eight bytes movq mm1, [src2] ; loads eight bytes paddb mm0, mm1 ; performs eight byte additions simultaneously movq [dst], mm0 ; store the result One instruction replaced eight separate additions!

MMX offers comparison instructions: pcmpgtb mm0, mm1 Each byte becomes either 0xFF or 0x00. These masks are useful when implementing threshold filters, sprite transparency, or collision logic.